Semiconductor processing equipment having improved particle performance

ABSTRACT

A ceramic part having a surface exposed to the interior space, the surface having been shaped and plasma conditioned to reduce particles thereon by contacting the shaped surface with a high intensity plasma. The ceramic part can be made by sintering or machining a chemically deposited material. During processing of semiconductor substrates, particle contamination can be minimized by the ceramic part as a result of the plasma conditioning treatment. The ceramic part can be made of various materials such as alumina, silicon dioxide, quartz, carbon, silicon, silicon carbide, silicon nitride, boron nitride, boron carbide, aluminum nitride or titanium carbide. The ceramic part can be various parts of a vacuum processing chamber such as a liner within a sidewall of the processing chamber, a gas distribution plate supplying the process gas to the processing chamber, a baffle plate of a showerhead assembly, a wafer passage insert, a focus ring surrounding the substrate, an edge ring surrounding an electrode, a plasma screen and/or a window.

FIELD OF THE INVENTION

The invention relates to semiconductor processing equipment and moreparticularly to improved particle performance during processing ofsemiconductor substrates in vacuum chambers having shaped ceramic partstherein.

BACKGROUND OF THE INVENTION

Particle performance is of concern in processing semiconductorsubstrates such as silicon wafers due to reduction in yield caused byparticles adhered to the surface of such substrates. One source of suchparticles is the substrates and techniques for reducing the number ofparticles include chemical treatments. For instance, U.S. Pat. No.5,051,134 discloses a wet chemical treatment for reducing the number ofparticles by treating a semiconductor surface with an aqueous solutioncontaining hydrofluoric acid. The '134 patent states that the acidsolution includes commercially available hydrofluoric acid and waterwhich meet the exceptionally high purity and particle freedomrequirements of the semiconductor industry.

U.S. Pat. No. 5,665,168 discloses a method for cleaning a silicon waferso as to suppress and reduce adhesion of particles to the surface of thewafer wherein the wafer is cleaned with a hydrofluoric acid aqueoussolution containing a surfactant followed by rinsing the wafer with purewater containing ozone. U.S. Pat. No. 5,837,662 discloses a process forcleaning contaminants from the surface of a wafer after the wafer hasbeen lapped, the process including contacting the wafer with anoxidizing agent to oxidize organic contaminants and immersing the waferin an aqueous bath containing citric acid into which sonic energy isdirected to remove metallic contaminants present on the surface of thewafer. The '662 patent states that the citric acid is a complexing agentwhich serves to trap metal ions and that particles of lapping grit andtrace metallic impurities present in a layer of silicon oxide (which ispart native oxide and partly formed in the oxidizing bath) can beremoved along with the oxide layer by contacting the wafer withhydrofluoric acid.

U.S. Pat. No. 5,712,198 discloses a technique for treating siliconwafers to reduce the concentration of metals such as Cr, Ca, Ti, Co, Mn,Zn and V on the surface thereof, the process including precleaning witha cleaning solution, metals removal with an aqueous solution containingHF, rinsing and oxide growth to produce a silicon oxide layer with athickness of 0.6 to 1.5 nanometers by contacting the wafers with highpurity ozonated water having a concentration of no more than 0.01 partsper billion each of Fe, Cr, Ti and other metals. Other patents whichrelate to cleaning of semiconductor substrates include U.S. Pat. Nos.5,454,901; 5,744,401; and 6,054,373.

U.S. Pat. No. 5,766,684 discloses a technique for cleaning andpassivating stainless steel surfaces such as gas flow equipment whichcan be used in semiconductor processing equipment, the process includingcontacting the surfaces with an aqueous solution containing acid so asto dislodge and remove residue followed by complexing free Fe ionsliberated from the surface to form an oxide film and precipitating thecomplexed ions into the oxide film.

U.S. Pat. No. 4,761,134 discloses silicon carbide components (e.g.,liners, process tubes, paddles, boats, etc.) for semiconductor diffusionfurnaces used to process silicon wafers wherein high purity siliconcarbide components are impregnated with high purity silicon metal andcoated with a high purity dense, impervious refractory coating such assilicon carbide, silicon nitride or silicon dioxide. According to the'134 patent, the silicon carbide must be at least 99% pure (preferablyat least 99.9% pure) so as not to be a source of contamination to thefurnace environment during sensitive wafer processing steps and therefractory coating protects the silicon impregnated sintered siliconcarbide substrate from exposure to the furnace environment and attack byacid during acid cleaning. Other patents relating to silicon carbidesemiconductor processing components include U.S. Pat. No. 4,401,689(susceptor tube), U.S. Pat. No. 4,518,349 (furnace support rod), U.S.Pat. No. 4,999,228 (diffusion tube), U.S. Pat. No. 5,074,456 (upperelectrode), U.S. Pat. No. 5,252,892 (plasma cathode chamber), U.S. Pat.No. 5,460,684 (resistive layer of ESC), U.S. Pat. No. 5,463,524 (sensingpin), U.S. Pat. No. 5,494,524 (heat treatment device), U.S. Pat. No.5,578,129 (filter plate of load lock system), U.S. Pat. No. 5,538,230(wafer boat), U.S. Pat. No. 5,595,627 (upper electrode), U.S. Pat. No.5,888,907 (electrode plate), U.S. Pat. No. 5,892,236 (ion implantationdevice) and U.S. Pat. No. 5,937,316 (heat treatment device such assusceptor, wafer holder, thermal uniformity plate, thermal uniformityring, dummy wafer). See also, Japanese Patent Publication Nos. 54-10825(semiconductor diffusion oven material), 60-200519 (susceptor),61-284301 (upper electrode), 63-35452 (diffusion oven tube, liner tube,port element, paddle), 63-186874 (microwave heated sample plate),63-138737 (upper electrode of plasma etch reactor), 3-201322 (coatingfor part in vacuum environment), and 8-17745 (wafer heater). Of these,Japanese Patent Publication Nos. 54-10825 and 63-35452 disclose partsmade of slip cast silicon carbide.

U.S. Pat. No. 4,598,665 discloses a technique for reducing dust duringheat treatment of semiconductor wafers by providing a silicon carbideprocess tube (wherein the wafers are treated) with an inner surfacecoarseness of 150 μm or less. The '665 patent states that when thesurface coarseness is greater than 150 μm, a porous SiO₂ film is formedon the inner surface of the process tube leading to dust generation.

U.S. Pat. No. 5,904,778 discloses a SiC CVD coating on free standing SiCfor use as a chamber wall, chamber roof, or collar around the wafer.U.S. Pat. No. 5,292,399 discloses a SiC ring surrounding a waferpedestal. A technique for preparing sintered SiC is disclosed in U.S.Pat. No. 5,182,059.

With regard to plasma reactor components such as showerhead gasdistribution systems, various proposals have been made with respect tothe materials of the showerheads. For instance, U.S. Pat. No. 5,569,356discloses a showerhead of silicon, graphite, or silicon carbide. U.S.Pat. No. 5,888,907 discloses a showerhead electrode of amorphous carbon,SiC or Al. U.S. Pat. Nos. 5,006,220 and 5,022,979 disclose a showerheadelectrode either made entirely of SiC or a base of carbon coated withSiC deposited by CVD to provide a surface layer of highly pure SiC.

In view of the need for increased yield during semiconductor processing,there is a need in the art for improvements in reduction of particlescaused by shaped (e.g., machined and/or sintered) ceramic parts exposedto the gases and/or the environment in which the semiconductorsubstrates are processed.

SUMMARY OF THE INVENTION

The invention provides a method of processing semiconductor substratesand reducing particle contamination during processing of the substrates,the method comprising steps of placing a substrate on a substrate holderin an interior space of a vacuum processing chamber, the processingchamber including at least one non-oxide ceramic part having a surfaceexposed to the interior space, the surface having been shaped andtreated to reduce particles thereon by a high intensity plasmaconditioning treatment, processing the substrate by supplying processgas to the processing chamber; and removing the substrate from theprocessing chamber.

According to a preferred embodiment, the processing chamber includes asubstantially planar antenna which energizes the process gas into aplasma state by supplying RF power to the antenna and the process gascomprises at least one fluorocarbon gas, the method further includingconditioning the exposed surface by energizing the fluorocarbon gas intoa plasma state and contacting the exposed surface with the plasma.During the process, a plurality of substrates can be processed byetching an oxide layer on the substrates with a high density plasmawhile supplying an RF bias to the substrate.

In an exemplary embodiment, the ceramic part comprises a gasdistribution plate supplying the process gas to the processing chamberand the processing chamber includes a substantially planar coil whichenergizes the process gas into a plasma state by supplying RF power tothe antenna, the method further including conditioning the exposedsurface by adjusting pressure in the processing chamber to 200 to 500mTorr, supplying the coil with 2000 to 2500 W of radio frequency power,and/or changing coil termination capacitance of the coil so as to movean area of higher intensity plasma across the gas distribution plate.

The method can further comprise a step of manufacturing the ceramic partby machining a part made of carbon, silicon, silicon carbide, siliconnitride, boron nitride, boron carbide, aluminum nitride or titaniumcarbide. In the case of a silicon carbide part, the part can be made ofCVD SiC, sintered SiC, sintered SiC coated with CVD SiC, convertedgraphite, or porous SiC backfilled with Si.

The invention also provides a method of plasma conditioning a shapedsurface of a ceramic part of a semiconductor processing chamber, themethod comprising treating the shaped surface to reduce particlesthereon by contacting the shaped surface with a high intensity plasma.For example, the method can include installing the ceramic part in aplasma reactor and the plasma conditioning can be carried out bytreating the shaped surface with a high density plasma while poweringthe ceramic part to increase ion bombardment thereof, treating theshaped surface with a high density plasma generated by energizing ahalogen gas into a plasma state, treating the shaped surface with a highdensity plasma generated by energizing an inert gas into a plasma state,treating the shaped surface with a high density plasma generated byenergizing oxygen gas into a plasma state, treating the shaped surfacewith a high density plasma generated by energizing a fluorine containinggas into a plasma state, and/or treating the shaped surface with a highdensity plasma while seasoning the reactor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1 a-d show SEM images of a machined CVD SiC sample which has beensubjected to a CO₂ cleaning process;

FIGS. 2 a-d show SEM images of a machined CVD SiC sample which has beensubjected to a low pressure SiC bead blasting process followed by CO₂cleaning;

FIG. 3 shows oxidation kinetics for single crystal SiC in the <111>direction;

FIGS. 4 a-d show SEM images of sample 11C oxidized at 1200° C. for 12hours;

FIGS. 5 a-d show SEM images of sample 12C oxidized at 1450° C. for 12hours;

FIG. 6 shows a single wafer vacuum processing chamber having aninductively coupled plasma source and a SiC gas distribution plate inaccordance with the invention; and

FIG. 7 shows a single wafer vacuum processing chamber having ashowerhead electrode and SiC baffle plate in accordance with theinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the field of semiconductor processing, various shaped parts of vacuumchambers in which semiconductor substrates are processed can be thesource of particle generation which adversely affects the yield ofdevices produced on the substrates. According to the invention, suchshaped parts are treated to minimize particle contamination of thesemiconductor substrates processed in the chamber.

Ceramic materials such as silicon carbide, silicon nitride, and the likehave been used for parts of equipment used in vacuum chambers. Suchparts can be made by sintering ceramic powders or by a CVD processfollowed by machining of one or more surfaces thereof. The shapedsurfaces can be the source of particle contamination during processingof semiconductor substrates. According to the invention, in order tocondition such parts to minimize particle generation duringsemiconductor processing, the exposed surfaces of such parts are treatedto incorporate or remove particles from the exposed surface. Accordingto a preferred embodiment, the surface layer is oxidized and the oxidelayer is optionally removed in a manner which reduces the number ofattached particles.

In the field of semiconductor processing, vacuum processing chambers aregenerally used for rapid thermal processing, sputtering, ionimplantation or ion milling, etching and chemical vapor deposition (CVD)of materials on substrates by supplying a process gas to the vacuumchamber. Such chambers may or may not apply an RF field to the gas toenergize the gas into a plasma state. Examples of parallel plate,transformer coupled plasma (TCP™) which is also called inductivelycoupled plasma (ICP), and electron-cyclotron resonance (ECR) reactorsand components thereof are disclosed in U.S. Pat. Nos. 4,340,462;4,948,458; 5,200,232 and 5,820,723. Because of the requirements forminimizing particle and/or heavy metal contamination, it is highlydesirable for the components of such equipment to exhibit high corrosionresistance with minimum particle generation.

During processing of semiconductor substrates, the substrates aretypically held in place within the vacuum chamber on substrate holdersby parts such as mechanical clamps and electrostatic clamps (ESC).Examples of such clamping systems and components thereof can be found inU.S. Pat. Nos. 5,262,029 and 5,838,529. Process gas can be supplied tothe chamber by parts such as by gas nozzles, gas rings, gas distributionplates, etc. An example of a temperature controlled gas distributionplate for an inductively coupled plasma reactor and components thereofcan be found in U.S. Pat. No. 5,863,376.

According to the invention, vacuum chamber parts made of oxide ornon-oxide ceramic materials such as alumina, silicon dioxide, quartz,carbon, silicon, silicon carbide, silicon nitride, boron nitride, boroncarbide, aluminum nitride and titanium carbide are treated to minimizeparticle generation. In a preferred embodiment, shaped (sintered and/ormachined) surfaces of the parts are subjected to a plasma conditioningtreatment to improve the particle performance of the parts. The plasmaconditioning treatment can be combined with an optional oxidizingtreatment to form an oxide layer on the parts and an optional cleaningtreatment to remove the oxide layer. The oxidizing treatment cancomprise a heat treatment in a furnace and the cleaning treatment cancomprise an etching treatment with an aqueous acid solution.

According to a preferred embodiment of the invention, an oxide ornon-oxide ceramic part of a plasma reactor is subjected to a plasmaconditioning treatment subsequent to an optional oxidizing treatmentand/or chemical etching to remove an oxide layer formed during theoxidizing step. As a result, attached particles which result frommachining can be removed from the part prior to or subsequent toinstallation in the plasma reactor. It has been found that after suchtreatment it is possible to achieve production conditions for processingsemiconductor wafers much faster than in the case where the part is onlysubjected to chemical cleaning prior to installation in the reactor. Inthe case where an oxidizing treatment is also performed, because theparticles would be incorporated in the oxide layer, the part could beused without removing the oxide layer.

According to a first embodiment of the invention, the oxide or non-oxideceramic part has been shaped by machining to desired dimensions and/orto provide a surface feature thereon such as a groove to receive anO-ring seal, bolt holes, gas distribution holes or passages, boss,flange, or the like. The machining can be performed by any suitabletechnique such as grinding, lapping, honing, ultrasonic machining, waterjet or abrasive jet machining, laser machining, electrical dischargemachining, ion-beam machining, electron-beam machining, chemicalmachining, electrochemical machining, or the like. Such abrasive andnon-abrasive machining methods can result in attached particles on themachined surfaces of the ceramic parts and the attached particles canbecome sources of particle contamination during processing ofsemiconductor substrates. Likewise, the shaped surfaces of sinteredceramic parts can be the source of particle contamination.

One type of non-oxide ceramic material which can be used for parts inaccordance with the invention is silicon carbide (SiC). The SiC part canbe manufactured by any suitable technique. For instance, the part can bemade by chemical vapor deposition of silicon carbide on a suitablesubstrate such as high purity graphite followed by machining to finaldimensions. If the as-machined part is installed in a wafer processingplasma reactor such as a plasma etch chamber, initially processed waferscan be contaminated with thousands of particles (e.g., around 20,000particles called “adders”).

According to one embodiment of the invention, a non-oxide ceramic partmade of silicon carbide is treated to improve particle performance bysubjecting the part to a heat treatment in an air environment whichprovides a surface oxide layer on the part. The oxidizing treatment iseffective to encapsulate the particles in the oxide layer and/or convertthe particles to an oxide which forms part of the oxide layer. The oxidelayer can then be optionally removed by a chemical etching treatment.For example, the part can be heated in a furnace at 1200 to 1700° C. for1 to 100 hours, preferably 1400 to 1500° C. for 8 to 16 hours, to forman oxide layer which is subsequently removed in an acid bath. After sucha treatment, the part can be installed in a plasma reactor such as aplasma etcher and wafers can be processed after routine chamberseasoning. However, parts which are subjected to intense ion bombardmentlike a gas distribution or baffle plate may benefit from an aggressiveplasma conditioning step. For example, the part can be powered toincrease ion bombardment of the machined surface, a halogen gas such asa fluorine-containing gas and/or oxygen and/or an inert gas such asargon can be incorporated in the plasma to more aggressivelyattack/sputter the machined surface, plasma conditions in the chambercan be adjusted such as by varying the terminal capacitance of the TCP™coil to move a zone of higher density plasma across the machinedsurface, and/or other process parameters (e.g., increase chamberpressure, increase RF power, increase gas concentration and/or reactivecomponents of the gas, increase treatment time, provide a magnetic fieldto confine plasma to a smaller area, use of various high density plasmasources such as helicon or microwave sources, etc.) can be modified tofurther condition the shaped surface.

In tests of a non-oxide ceramic part in the form of an as-machined CVDSiC gas distribution plate in a TCP™ 9100 high density plasma dielectricetch chamber available from LAM Research Corporation, a large number ofparticles contaminated a silicon wafer during processing. In a standardparticle test, it was found that >20,000 particles contaminated thewafer and the average particle size of the particles was in the range of0.2 to 0.5 μm. Auger analysis of the particles revealed that thecontaminating particles were SiC particles. The SiC particles appear tobe residual damage from machining of the SiC gas distribution plate.

In order to compare the particle performance of a part preparedaccording to the invention versus a part having inferior particleperformance, machined CVD SiC parts and/or samples were surfaceconditioned as follows.

Comparative CVD SiC samples and a CVD SiC gas distribution plate (GDP)were prepared by CO₂ blasting (a technique used to clean Al₂O₃) the CVDSiC material to determine if the 0.2 μm SiC particles could be cleanedfrom the surface. The comparative samples were analyzed using SEM andthe GDP was tested in a plasma etcher. FIGS. 1 a-d show SEM images of amachined CVD SiC sample surface after the CO₂ cleaning and it can beseen that SiC particles are on the surface of the sample. In a particletest, plasma processing with the CO₂ cleaned GDP resulted in a reductionin the number of particles transferred to a silicon wafer processed inthe etcher but the number of particles was over 10,000. It is believedthat the CO₂ cleaning is effective in removing loose SiC particles butother partially attached SiC particles formed during machining of thepart are not removed until attacked by the plasma in the etcher and onceliberated can contaminate the wafer.

Another technique tested involved a low pressure SiC bead blastingprocess followed by CO₂ cleaning. The results of this cleaning processare shown in the SEM images of FIGS. 2 a-d which show SiC particles onthe surface of a machined CVD SiC sample which had been subjected to lowpressure SiC bead basting followed by CO₂ cleaning.

In another technique, high temperature oxidation followed by chemicaletching was carried out. In this process, the high temperature oxidationof the SiC depends on the partial pressure of the oxygen used in theheat treatment. That is, at higher oxygen levels, an increase in weightis observed in the passive oxidation by the formation of a SiO₂ filmaccording to the following equation:2SiC_((s))+3O_(2(g))=2SiO_(2(s))+2CO_((g)). At lower oxygen partialpressures, the active oxidation causes rapid weight loss by formation ofSiO gas according to the following equation:SiC_((s))+2SiO_(2(s))=3SiO₂+2CO_((g)) orSiC_((s))+O_(2(s))=SiO_(2(g))+CO_((g)). In general, the passiveoxidation rate occurs as a function of time and temperature as definedby the following equation: (oxide thickness)²=(parabolic rateconstant)×(time). Accordingly, SiO₂ thickness grows at a parabolic rate,meaning the rate decreases as thickness increases. This decrease in theoxidation rate is associated with the diffusion of oxygen through theSiO₂ layer that is formed. In addition, it has been determined that theoxidation rate varies as a function of the crystallographic orientationof the CVD SiC. The <111> plane oxidizes at a faster rate that the <111>plane. Because the typical CVD SiC components are randomly oriented inthe <111> direction, the parabolic rate constants for this directionwere chosen for evaluating the oxidizing heat treatment of the CVD SiCcomponents, as follows: Temperature (° C.) Parabolic Rate Constant(nm²/min) 1200 4.06 × 10  1300 3.31 × 10² 1400 9.43 × 10² 1450 2.86 ×10³ 1500 4.97 × 10³

FIG. 3 illustrates the theoretical oxidation thickness calculated on thebasis of the parabolic rate constants set forth in the above table. Inorder to incorporate SiC particles having sizes of 0.2 to 0.5 μm in theoxide layer, the oxidation treatment is preferably carried out underoxidizing conditions at a temperature and time sufficient to form anoxide layer at least as thick as the SiC particles. If desired, watervapor or other oxygen source can be used to adjust the oxygen partialpressure of a furnace atmosphere wherein the parts are oxidized. Forinstance, the oxidation treatment can be carried out in air at 1200 to1700° C. to provide an oxide layer having a thickness of at least 0.2μm.

FIGS. 4 a-d show SEM images from Sample 11C which is a coupon measuring0.75″×0.75″×0.125″ and treated by oxidizing in air at 1200° C. for 12hours to achieve a target oxide thickness (e.g., estimated to be about0.15 μm) followed by chemically stripping the oxide with an etchant ofhydrofluoric acid and deionized water (DI), e.g., 1HF:1HNO₃:1DI for 12hours.

FIGS. 5 a-d show SEM images from Sample 12C which is a coupon measuring0.75″×0.75″×0.125″ and treated by oxidizing in air at 1450° C. for 12hours to achieve a target oxide thickness (e.g., estimated to be about1.4 μm) followed by chemically stripping the oxide with 1HF:1HNO₃:1DIfor 12 hours. Compared to as-machined surfaces, the treated surfaces hada substantially reduced number of particles and samples treated athigher temperatures exhibit smoother surfaces compared to samplestreated at lower temperatures.

Standard particles per wafer per pass (PWP) tests were carried out usinga LAM 9100™ plasma etch reactor with (1) a machined CVD SiC GDPsubjected to standard wet cleaning and (2) the same GDP after anoxidation and oxide stripping conditioning treatment.

During a first PWP test, a polished silicon wafer used to measureparticles (particle wafer) was loaded in the chamber, a standard processrecipe was run (i.e., a main etch recipe using a chamber pressure of 5mTorr, TCP™ power of 1700 W, bottom electrode off, 8 sccm C₄F₈+20 sccmC₂F₆+100 sccm Ar for 60 seconds followed by a multi-step in-situ chamberclean using chamber pressures of 15 to 80 mTorr, TCP™ power of 1500 to1750 W, bottom electrode off, and 300 to 750 sccm O₂ in 15 secondintervals), the wafer was removed from the chamber and put back on theparticle counter (e.g., KLA Tencor Surfscan 6200) which generated aparticle map. The particle map showed that the wet cleaned GDP displayedvery poor particle performance since the particles saturated theparticle counter.

This GDP was removed from the chamber and subjected to an oxidizingtreatment (1450° C. for 12 hours in air) to provide a layer of oxide ofat least 0.5 μm after which the oxide was wet chemically stripped with asolution of 1HF:1HNO₃:1DI. Critical dimensions and weight loss of thegas distribution plate were measured before and after the conditioningprocess. As a result of these measurements it was determined that thegas distribution plate remained dimensionally stable during the hightemperature oxidation treatment and the weight loss (which was about0.7%) as a result of the oxide stripping indicates that the attachedparticles were efficiently removed from the surface.

The conditioned GDP was reinstalled in the same chamber and another PWPtest was run. The test revealed that the particle count was reduced byorders of magnitude, i.e., the particle map showed a particle count of123. However, taking into account certain extraneous sources ofparticles such as the number of particles on the particle wafer prior tothe test (measured at 22 particles), the particles contributed by theload lock cassette (measured at 25 particles) and the particlescontributed by the wafer transport mechanism (not measured), theadjusted particle count attributed primarily to the GDP was 76.

In running production wafers, it is desirable to reduce the particlecount to below 20, preferably below 10 particles. To improve theparticle performance of the GDP, the GDP can be exposed to a plasmaenvironment in the reactor by running an aggressive plasma condition inthe reactor. For example, the process recipe conditions can be made moreaggressive to the GDP by increasing the plasma density (e.g., increasingthe TCP coil power 1700 to 2300 W), increasing chamber pressure (e.g.200 to 500 mTorr) and changing the gas chemistry to be more reactivetowards the part being conditioned (e.g., increasing fluorocarbon flowrate, adding oxygen, and/or adding Ar for sputtering SiC parts).

In an actual production environment, wherein wafers were processed in aplasma etch reactor (i.e., a LAM TCP™ 9100) using the oxidized andchemically cleaned CVD SiC gas distribution plate, it was found thatparticle contamination could be reduced from the saturated particlecount for an as-machined gas distribution plate to less than 100 adderswith the conditioned gas distribution plate immediately afterinstallation of the plate. The particle contamination was furtherreduced to less than 10 adders by subjecting the plate to an aggressiveplasma treatment in the etch reactor for 1 hour with 25 conditioningwafers. In particular, the etch reactor was run using elevated pressure,elevated TCP™ power and elevated flow of the fluorine containing gas(e.g., chamber pressure of 200 to 500 mTorr, TCP™ power of 2000 to 2500W, C₂F₆ flow of 40 to 60 sccm, and changing of coil terminationcapacitance to move the area of high intensity plasma across the GDP).

Although the examples given above are for non-oxide ceramic parts madeof silicon carbide, the surface treatment according to the invention canbe used on other ceramic parts such as alumina, silicon dioxide, quartz,carbon, silicon, nitride materials such as silicon nitride, boronnitride, aluminum nitride, etc. or carbide materials such as boroncarbide, titanium carbide and the like.

Ceramic parts of silicon carbide can be prepared by many differenttechniques including chemical vapor deposition (CVD), sintering SiCpowder (e.g., slip cast or hot pressed SiC powder), sintering SiC powderand infiltrating with Si, sintering SiC powder and coating with CVD SiC,conversion of graphite with silicon vapor to form SiC, conversion ofgraphite to form SiC and infiltrating with Si, conversion of graphite toform SiC and coating with CVD SiC, etc. Parts of such materials can beconditioned according to the invention to provide improved particleperformance. For instance, machined or sintered surfaces of such partscan be used directly after an oxidizing treatment to incorporateparticles in an oxide layer in which case the oxide layer is notstripped from the part prior to installation of the part in asemiconductor processing apparatus such as a vacuum chamber.Alternatively, the oxide layer can be stripped prior to use of the partin a semiconductor processing apparatus.

CVD SiC can be used to surround a wafer in a rapid thermal processing(RTP) chamber. Such material is translucent when machined very thinmaking it difficult to obtain temperature measurements using an infrared(IR) pyrometer. To solve this problem the SiC can be coated with a thinlayer of high purity silicon but such a technique is problematic in thatthe part rejection rate is high due to growth of dendritic siliconpresumably from surface particulate. By treating the machined SiC withthe oxidizing and oxide stripping treatment according to the invention,it is possible to reduce the surface particulate and thereby raise theyield of the silicon coated SiC product.

Ceramic parts such as silicon carbide and silicon nitride transfermembers can be used in high temperature wafer support applications forloading, processing and unloading the wafers. During such supportapplications, in order to minimize wafer backside scratching, theceramic parts can be treated according to the invention to provide asmoother wafer contacting surface. For instance, the parts can be givenan oxidizing treatment in accordance with the invention to provide asmooth oxide surface layer. Further, the oxidized layer can be strippedin accordance with the invention if a non-oxide surface is desired.

The ceramic part treated according to the invention can have any desiredconfiguration such as that of a wafer passage insert, a chamber wall orliner, a substrate support, an electrode, a showerhead, a gasdistribution plate or component such as a baffle plate, a transfermember, focus ring, edge ring, plasma screen, window, etc. Preferredmaterials for the ceramic part are Si and SiC in the case of plasmaenvironments since such materials meet the high purity requirements ofsemiconductor processing equipment and plasma erosion of Si or SiCconditioned surfaces produces gaseous Si or C compounds which can bepumped from the chamber without particle contamination of the substrate.SiC also has the advantage of exhibiting exceptionally high thermalconductivity enabling parts of such material to be heated or cooled to adesired temperature range during processing of substrates such assilicon wafers.

The ceramic part can be used in any plasma reaction chamber wherein itis desired to reduce particle contamination. An example of a singlewafer vacuum processing chamber 2 having an inductively coupled plasmasource is shown in FIG. 6 wherein processing gas is supplied to theprocessing chamber 2 by suitable apparatus (not shown) such as gasdistribution rings, gas distribution plate, injection nozzles, etc., anda vacuum is maintained in the interior 4 of the chamber by suitablevacuum pump apparatus. The substrate to be processed in the chamber cancomprise a silicon semiconductor wafer 6 supported on a substratesupport 8. The substrate support 8 can include an electrostatic chuckand a focus ring 10. The vacuum pump can be connected to a large outletport 12 in an endwall such as the bottom of process chamber. The vacuumprocessing chamber can include a dielectric window 14, a gasdistribution plate 16 and RF power can be supplied to the chamberthrough an external RF antenna such as a planar coil 18 outside thedielectric window 14 on an endwall such as the top of the chamber.However, the plasma generating source can be of any other type of plasmagenerating equipment such as that of an ECR reactor, a capacitivelycoupled parallel plate reactor, a surface wave reactor, a magnetronreactor, helicon reactor, helical resonator, etc. The plasma generatingsource can be attached to a modular mounting arrangement such as anannular mounting flange which is removably mounted on the endwall of thechamber.

The chamber includes a liner 20, a plasma screen 22 for confining theplasma in the space surrounding the wafer 6 extends inwardly from thelower end of the liner 20 and a wafer passage insert. The liner 20 canbe supported in any suitable way such as by an elastically bendableframe in the case of a solid cylindrical liner which includes an innersupport frame 24 and an outer support frame 26. In order to maintain theliner at a desired temperature during processing of a substrate, aheater 28 can be provided on the top of the inner frame support 24. Inoperation, the heater 28 is effective to heat the liner 20 and removalof heat from the liner 20 can be accomplished by a temperaturecontrolled member 30 which withdraws heat from the liner through theinner and outer frames. Other types of heating arrangements such as aheater embedded in the liner or suitable radiant heating arrangementscan also be used.

The plasma chamber liner 20 can comprise a one-piece liner ormulti-piece liner such as interlocking ceramic tiles. To provide anelectrical ground path for the plasma, the tiles are preferably of anelectrically conductive material such as silicon and carbon. Forexample, the tiles can be entirely of CVD SiC or Si impregnated SiCcoated with CVD SiC. Such a material provides an added benefit in thatit does not contain aluminum and thus reduces Al contamination ofprocessed substrates. The SiC tiles can be bonded to an aluminum backingplate using an electrically conductive elastomer which can absorblateral stresses caused by different thermal expansion coefficients ofthe SiC and Al. Each tile and backing plate assembly can be attacheddirectly or indirectly to the chamber wall. For example, the tiles canbe supported by a support frame which includes an inner frame and anouter frame. Temperature control of the liner can be achieved by aheater supplied power by electrical leads and a temperature controlledmember.

The plasma screen 22 can extend inwardly from a lower edge of the tilesand the plasma screen can be of an electrically conductive ceramicmaterial such as Si impregnated SiC coated with CVD SiC and includesopenings which are small enough to confine the plasma but allow processgas and processing byproducts to be removed by the vacuum pump.

Like the GDP described above, the showerhead electrode assembly shown inFIG. 7 is a consumable part which must be replaced periodically. Becausethe electrode assembly is attached to a temperature-controlled member,for ease of replacement, the upper surface of the outer edge ofelectrode 40 (e.g., high purity silicon) can be bonded to a support ring42 (e.g., graphite) with solder or by other techniques, such as by anelastomeric joint.

The electrode 40 shown in FIG. 7 is a planar disk having uniformthickness from center to edge thereof and an outer flange on ring 42 isclamped by a clamping ring 46 to a temperature-controlled member 44having water cooling channels 43. Water is circulated in the coolingchannels 43 by water inlet/outlet connections 43 a. A plasma confinementring 47 surrounds the outer periphery of electrode 40. The plasmaconfinement ring 47 is bolted to a dielectric annular ring 48 which inturn is bolted to a dielectric housing 48 a. The purpose and function ofconfinement ring 47 is to cause a pressure differential in the reactorand increase the electrical resistance between the reaction chamberwalls and the plasma thereby confining the plasma between the upper andlower electrodes. A radially inwardly extending flange of clamping ring46 engages the outer flange of support ring 42. Thus, no clampingpressure is applied directly against the exposed surface of electrode40.

Process gas from a gas supply is supplied to electrode 40 through acentral hole 50 in the temperature-controlled member 44. The gas then isdistributed through one or more vertically spaced apart baffle plates 42and passes through gas distribution holes (not shown) in the electrode40 to evenly disperse the process gas into reaction chamber 44. In orderto provide enhanced heat conduction from electrode 40 totemperature-controlled member 44, process gas can be supplied to fillopen spaces between opposed surfaces of temperature-controlled member 44and support ring 42. In addition, gas passage 57 connected to a gaspassage (not shown) in the annular ring 48 or confinement ring 47 allowspressure to be monitored in the reaction chamber 54. To maintain processgas under pressure between temperature-controlled member 44 and supportring 42, a first O-ring seal 58 is provided between an inner surface ofsupport ring 42 and an opposed surface of temperature-controlled member44 and a second O-ring seal 59 is provided between an outer part of anupper surface of support ring 42 and an opposed surface of member 44. Inorder to maintain the vacuum environment in chamber 24, additionalO-rings 60, 62 are provided between temperature-controlled member 44 andcylindrical member 48 b and between cylindrical member 48 b and housing48 a. In accordance with the invention, the lower baffle 42 a is made ofa non-oxide ceramic such as carbon silicon, silicon carbide, siliconnitride, boron carbide, boron nitride, titanium carbide or aluminumnitride.

According to a preferred embodiment of the invention, the lower baffleplate can be made of a highly pure silicon carbide, e.g., at least about99.999% pure. An especially preferred silicon carbide from a costperspective is a non-sintered form of silicon carbide made by graphiteconversion wherein a shaped piece of graphite is reacted with siliconvapor at temperatures such as 1600° C. to convert the graphite tosilicon carbide. The starting graphite is preferably a fine particle,low porosity high purity graphite shaped to desired dimensions. As aresult of the conversion to silicon carbide by the silicon vapor, thebulk silicon carbide can have a porosity ranging from 10 to 30%, e.g.,around 20%. If desired, part can be back-filled with silicon and/or thepart can be coated with a layer of CVD SiC.

The non-oxide ceramic baffle plate can be designed as a drop-inreplacement for existing aluminum baffle plates or as a part of any gasdistribution system wherein it is desired to reduce contaminationattributable to that particular part. Because the baffle plate willundergo some machining, it is desirable to condition the baffle plate inaccordance with the invention, e.g., oxidizing the surface and removingthe oxide layer by chemical etching. The baffle plate can be used as adrop-in replacement for the aluminum baffle plate of an Exelan® or4520XLE®, both of which are manufactured by LAM Research Corporation.

Like the GDP discussed above, the ceramic baffle plate according to theinvention provides reduced particle contamination. That is, since thelower baffle is directly behind the showerhead electrode, aline-of-sight exists between it and the plasma via the holes in theshowerhead electrode. Ions generated in the plasma are acceleratedthrough the showerhead holes towards the baffle, causing the bafflesurface to be sputtered. As a result, particles from a machined surfaceof the baffle plate could enter the chamber and contaminate the waferundergoing processing. Such particle defects reduce the yield of thewafer.

The foregoing has described the principles, preferred embodiments andmodes of operation of the present invention. However, the inventionshould not be construed as being limited to the particular embodimentsdiscussed. Thus, the above-described embodiments should be regarded asillustrative rather than restrictive, and it should be appreciated thatvariations may be made in those embodiments by workers skilled in theart without departing from the scope of the present invention as definedby the following claims.

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 31. A ceramic part for a vacuum processingchamber for processing semiconductor substrates, the ceramic partcomprising: a non-oxide ceramic material having an as-machined oras-sintered outer surface; and an oxide layer on the outer surface andforming an outermost surface of the ceramic part, the oxide layer havingincorporated therein particles of the non-oxide ceramic material whichare attached on the outer surface.
 32. The ceramic part of claim 31,which is a gas distribution plate.
 33. The ceramic part of claim 31,which is an electrode.
 34. The ceramic part of claim 31, which is abaffle plate of a showerhead electrode assembly.
 35. The ceramic part ofclaim 31, which is a chamber liner.
 36. The ceramic part of claim 31,which is a plasma screen.
 37. The ceramic part of claim 31, which is afocus ring or an edge ring.
 38. The ceramic part of claim 31, which is awindow.
 39. The ceramic part of claim 31, wherein the oxide layer has athickness which is greater than the thickness of the particles.
 40. Aceramic part for a vacuum processing chamber for processingsemiconductor substrates, the ceramic part comprising: silicon orsilicon carbide having an as-machined or as-sintered outer surface; andan oxide layer on the outer surface and forming an outermost surface ofthe ceramic part, the oxide layer having incorporated therein particlesof the silicon or silicon carbide which are attached on the outersurface.
 41. The ceramic part of claim 40, wherein the non-oxide ceramicmaterial is CVD SiC, sintered SiC, sintered SiC coated with CVD SiC,converted graphite, or porous silicon carbide backfilled with silicon.42. The ceramic part of claim 40, which is a gas distribution plate. 43.The ceramic part of claim 40, which is an electrode.
 44. The ceramicpart of claim 40, which is a baffle plate of a showerhead electrodeassembly.
 45. The ceramic part of claim 40, which is a chamber liner.46. The ceramic part of claim 40, which is a plasma screen.
 47. Theceramic part of claim 40, which is a focus ring or an edge ring.
 48. Theceramic part of claim 40, which is a window.
 49. The ceramic part ofclaim 40, wherein the oxide layer has a thickness which is greater thanthe thickness of the particles.
 50. A showerhead electrode for a vacuumprocessing chamber for processing semiconductor substrates, theshowerhead electrode comprising: silicon or silicon carbide having anas-machined or as-sintered outer surface; and an oxide layer on theouter surface and forming an outermost surface of the showerheadelectrode, the oxide layer having incorporated therein particles of thesilicon or silicon carbide which are attached on the outer surface. 51.The showerhead electrode of claim 50, which is of converted graphite.52. The showerhead electrode of claim 50, which is of silicon.
 53. Theshowerhead electrode of claim 50, wherein the oxide layer is of siliconoxide.
 54. The showerhead electrode of claim 50, wherein the oxide layerhas a thickness which is greater than the thickness of the particles.